Have purchased a brand new DM 8000 HD .
Flashing through WEBIF went 100% good , but after re-boot the receiver stops ar " Starting " message ?!
Have tried to re-program the receiver with Nullmodem ( RS232 ) and DreamUp ( latest version ) , the initialising phase goes through , and when the
"checking checksum" appears , this message stays for a very long time without progress ?
What is wrong ? Is it any way to try programing the second stage loader with Dream Up , ( there is no such option with DM 8000HD ) ?
Here is the logg from the Hyper terminal :
BCM97400
AB
FFFFFFFF
1s
Sync=1
LLMB=1
L2=1
RAC_I=1
RAC_D=1
Copy Code...34TUCV
(c) 2007,2008 Dream Multimedia GmbH. All rights reserved.
Dreambox DM8000
FIRST STAGE 1.10 {BO23456}
2ND STAGE OK, build #74 (20090820)
0.000 - BCM board setup
Configure MEMC1_2........ Done
0.039 - fp init
FP version 5 detected
0.106 - ca init
0.811 - load config
dCA: not existent, loading defaults
1.393 - config loaded.
* press [S] to enter setup
OLED found!
BOOT #74(20090820)
- NAND PROBE: 2c da 80 95 (normal)
detected jffs2 blocksize: 128kb
++++++++++++++++++++++++
dreamupd initialized
Scanning JFFS2 FS: . done.
/flash/bootlogo.elf
bootlogo size: 80984
using 1280x720p (60.00 Hz)
create surface 1280 720
Using the Small jpeg decoder library, Copyright (c) 2006, Luc Saillard <luc@saillard.org>
parsing JPEG header..
JPEG Size: 1280x720
/flash/vmlinux.gz
<5>Linux version 2.6.12-5.1-brcmstb-dm8000 (newnigma2@vs35) (gcc version 4.1.1) #1 Wed Aug 19 21:04:54 UTC 2009
c->processor_id == 0002a042
MIPs 7400B0 id = 2a042
Before: firmhandl=00000000, firmentry=00000000, seal=8330115c,bootParmsAddr=803686e8
Not called from CFE
No arguments presented to boot command
HI WORLD!!!
board_init_once: regval=2219c310, ddr_strap=2, 4 chips, pci_size=0
Detected 256 MB on board
cfeBootParms ===>
Number of Nand Chips = 0
Default command line =
root=/dev/mtdblock3 rootfstype=jffs2 rw console=null
1 831ffed8 83040758
Kernel boot options: root=/dev/mtdblock3 rootfstype=jffs2 rw console=null
gFlashSize=00000000, query[0]=6165, [1]=206d, [2]=754d
**********BOOTEDFROMROM, Base=1c000000
Initial CP0 22 value : 0xe30e3406
Updated CP0 22 value : 0xe31e3406
CPU revision is: 0002a042
FPU revision is: 00130001
Determined physical RAM map:
memory: 10000000 @ 00000000 (usable)
---> memsize from bootloader: 158
User-defined physical RAM map:
node [00000000, 09e00000: RAM]
node [09e00000, 06200000: RSVD]
<4>bootmem_init: map 0 type 1
<4>bootmem_init: curr_pfn 0x0000038d last_pfn 0x0000ffff max_low_pfn 0x00010000
<4>bootmem_init: Done
<7>On node 0 totalpages: 65536
<7> DMA zone: 65536 pages, LIFO batch:31
<7> Normal zone: 0 pages, LIFO batch:1
<7> HighMem zone: 0 pages, LIFO batch:1
Before resource_init
After resource_init
Built 1 zonelists
<5>Kernel command line: root=/dev/mtdblock3 rootfstype=jffs2 rw console=null
======> Before RAC_init:$22s5=00000020, $22s6(CBA)=11f0000c
@B1F0_001C=00000001, @B1F0_0004=2fff0000, @B1F0_0000=01e0701f, @B1F0_0008=0000000f
CBA = 11f00000 VALUE = 255 PAR_VAL2 = 0fff0000
RAC0 = b1f00000 RAC1 = b1f00008 RAC_RANGE = b1f00004
before init RAC 0x01e0701f 0x0000000f 0x2fff0000
******* RAC initialization is performed by CFE on this platform
******* $22s0=e31e3406, $22s5=00000020, $22s6=11f0000c
Primary instruction cache 32kB, physically tagged, 2-way, linesize 64 bytes.
Primary data cache 64kB, 4-way, linesize 64 bytes.
MIPS_CACHE_ALIASES = ON
end of ld_mmu_r4xx0
end of local_tlb_init
Wired: 5
Index: 0 pgmask=64Mb va=d0000000 asid=00
[pa=d0000000 c=2 d=1 v=1 g=1]
[pa=d4000000 c=2 d=1 v=1 g=1]
Index: 1 pgmask=64Mb va=d8000000 asid=00
[pa=d8000000 c=2 d=1 v=1 g=1]
[pa=dc000000 c=2 d=1 v=1 g=1]
Index: 2 pgmask=64Mb va=e0000000 asid=00
[pa=e0000000 c=2 d=1 v=1 g=1]
[pa=e4000000 c=2 d=1 v=1 g=1]
Index: 3 pgmask=64Mb va=e8000000 asid=00
[pa=e8000000 c=2 d=1 v=1 g=1]
[pa=ec000000 c=2 d=1 v=1 g=1]
Index: 4 pgmask=4Mb va=f0000000 asid=00
[pa=f0000000 c=2 d=1 v=1 g=1]
[pa=f0400000 c=2 d=1 v=1 g=1]
######### SUN_TOP_CTRL_SW_RESET @b0404014 = 00000000
######### PCI-X Bridge RevID @b0500200 = 00000102
######### PCI-X Bridge BCHP_PCIX_BRIDGE_SATA_CFG_INDEX @b0500208 = 00000004
######### PCI-X Bridge BCHP_PCIX_BRIDGE_SATA_CFG_DATA @b050020c = 02100147
######### PCI-X Bridge BCHP_PCIX_BRIDGE_PCIX_SLV_MEM_WIN_BASE @b0500210 = 00000001
######### PCI-X Bridge BCHP_PCIX_BRIDGE_PCIX_SLV_MEM_WIN_MODE @b0500214 = 00000000
######### PCI-X Bridge BCHP_PCIX_BRIDGE_CPU_TO_SATA_MEM_WIN_BASE @b0500218 = b0510000
######### PCI-X Bridge BCHP_PCIX_BRIDGE_CPU_TO_SATA_IO_WIN_BASE @b050021c = 00000000
######### PCI-X Bridge BCHP_PCIX_BRIDGE_RETRY_TIMER @b0500220 = 00000000
$$$$$$$$$$SATA dev id @b050020c = 860214e4
$$$$$$$$$$ 1394 dev id ffffffff
$$$$$$$$$$ mini slot dev id ffffffff
$$$$$$$$$$ external dev id 001a168c
Synthesized TLB refill handler (20 instructions).
Synthesized TLB load handler fastpath (32 instructions).
Synthesized TLB store handler fastpath (32 instructions).
Synthesized TLB modify handler fastpath (31 instructions).
PID hash table entries: 2048 (order: 11, 32768 bytes)
mips_counter_frequency = 202000000 from Calibration, = 148500000 from header(CPU_MHz/2)
Using 202.501 MHz high precision timer.
Console: colour dummy device 80x25