I do not get to the rescue situation what is wrong how do I do
bl2_stage_init 0x01
bl2_stage_init 0x81
hw id: 0x0000 - pwm id 0x01
bl2_stage_init 0xc1
bl2_stage_init 0x02
L0:e033003f
L1:00000703
L2:0000c067
L3:14000020
B2:00433060
B1:f0c021b0
TE: 588543
BL2 Built : 15:17:18, Feb 20 2019. g12b gb91a9c0 - jenkins@walle02Ysh
Board ID = 2
Set A53 clk to 24M
Set A73 clk to 24M
Set clk81 to 24M
A53 clk: 1200 MHz
A73 clk: 1200 MHz
CLK81: 166.6M
smccc: 00090796
eMMC boot @ 0
sw8 s
sd/emmc cmd 8 arg 0x00000000 status 01ff3000
DDR driver_vesion: LPDDR4_PHY_V_0_1_11 build time: Feb 20 2019 15:17:14
board id: 2
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
fw parse done
Load ddrfw from eMMC, src: 0x00014200, des: 0xfffd0000, size: 0x0000c000, part: 0
Load ddrfw from eMMC, src: 0x00068200, des: 0xfffd0000, size: 0x00004000, part: 0
PIEI prepare done
Cfg max: 4, cur: 1. Board id: 255. Force loop cfg
DDR4 probe
ddr clk to 1200MHz
Load ddrfw from eMMC, src: 0x0002c200, des: 0xfffd0000, size: 0x0000c000, part: 0
Check phy result
INFO : End of initialization
INFO : End of read enable training
INFO : End of fine write leveling
INFO : End of read dq deskew training
INFO : End of MPR read delay center optimization
INFO : End of Write leveling coarse delay
INFO : End of write delay center optimization
INFO : End of read delay center optimization
INFO : End of max read latency training
INFO : Training has run successfully!
1D training succeed
Load ddrfw from eMMC, src: 0x00038200, des: 0xfffd0000, size: 0x0000c000, part: 0
Check phy result
INFO : End of initialization
INFO : End of 2D read delay Voltage center optimization
INFO : End of 2D write delay Voltage center optimization
INFO : Training has run successfully!
R0_RxClkDly_Margin==117 ps 9
R0_TxDqDly_Margi==156 ps 12
R1_RxClkDly_Margin==0 ps 0
R1_TxDqDly_Margi==0 ps 0
dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0001
ddr scramble enable
2D training succeed
auto size-- 65535DDR cs0 size: 2048MB
DDR cs1 size: 0MB
DMC_DDR_CTRL: 0040002cDDR size: 2048MB
cs0 DataBus test pass
cs0 AddrBus test pass
pre test bdlr_100_average==452 bdlr_100_min==452 bdlr_100_max==452 bdlr_100_cur==452
aft test bdlr_100_average==452 bdlr_100_min==452 bdlr_100_max==452 bdlr_100_cur==452
100bdlr_step_size ps== 457
result report
boot times 0
non-sec scramble use zero key
ddr scramble enabled
Enable ddr reg access
00000000
emmc switch 3 ok
Authentication key not yet programmed
get rpmb counter error 0x00000007
00000000
emmc switch 0 ok
Load FIP HDR from eMMC, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0
Load BL3X from eMMC, src: 0x0006c200, des: 0x0175c000, size: 0x00128000, part: 0
0.0;0.0;M3 CHK:0;bl30 start
run into bl31
NOTICE: BL31: v1.3(release):bee21ef
NOTICE: BL31: Built : 16:42:55, Feb 21 2019
NOTICE: BL31: G12A secure boot!
INFO: BL3-2: ATOS-V2.4-202-g7b21f5e #1 Fri Dec 21 01:30:01 UTC 2018 arm
INFO: BL3-2: Chip: Unknown Rev: A (29:A - 40:2)
INFO: BL3-2: crypto engine DMA
INFO: BL3-2: secure time TEE
INFO: BL3-2: CONFIG_DEVICE_SECURE 0xb200000e
U-Boot 2015.01-g90d64dd5d3-dirty (Apr 23 2019 - 10:52:48)
DRAM: 2 GiB
Relocation Offset is: 76ef7000
spi_post_bind(spicc): req_seq = 0
spi_post_bind(spifc): req_seq = 1
register usb cfg[0][1] = 0000000077f8a4a8
MMC: dm one emmc init
.
aml_priv->desc_buf = 0x0000000073ee77b0
aml_priv->desc_buf = 0x0000000073ee9af0
SDIO Port B: 0, SDIO Port C: 1
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x3, tx-dly 0, clock 400000
emmc/sd response timeout, cmd8, status=0x1ff2800
emmc/sd response timeout, cmd55, status=0x1ff2800
co-phase 0x3, tx-dly 0, clock 400000
co-phase 0x1, tx-dly 0, clock 40000000
aml_sd_retry_refix[983]:delay = 0x0,gadjust =0x62000
[mmc_startup] mmc refix success
init_part() 297: PART_TYPE_AML
[mmc_init] mmc init success
skip dtb signature check
start dts,buffer=0000000073eec360,dt_addr=0000000073eec360
check_valid_dts: FDT_ERR_BADMAGIC
get_partition_from_dts() 71: ret -9
get_partition_from_dts() 74: ret -9
get_ptbl_from_dtb()-269: get partition table from dts faild
mmc_device_init()-1251: get partition table from dtb failed
init_part() 297: PART_TYPE_AML
eMMC/TSD partition table have been checked OK!
crc32_s:0x1577dad == storage crc_pattern:0x1577dad!!!
crc32_s:0xee152b83 == storage crc_pattern:0xee152b83!!!
crc32_s:0x7fd3b243 == storage crc_pattern:0x7fd3b243!!!
mmc env offset: 0x7400000
In: serial
Out: serial
Err: serial
reboot_mode=cold_boot
itest - return true/false on integer compare
Usage:
itest [.b, .w, .l, .s] [*]value1 <op> [*]value2
[store]To run cmd[emmc dtb_read 0x1000000 0x40000]
_verify_dtb_checksum()-2755: calc 0, store 0
update_dtb_info()-2863: cpy 1 is not valid
_verify_dtb_checksum()-2755: calc 0, store 0
update_dtb_info()-2863: cpy 0 is not valid
dtb_read()-2972: total valid 0
emmc - EMMC sub system
Usage:
emmc dtb_read addr size
emmc dtb_write addr size
emmc erase dtb
emmc erase key
emmc fastboot_read addr size
emmc fastboot_write addr size
[KM]Error:f[keymanage_dts_parse]L287:not a fdt at 0x0000000001000000
vpu: error: vpu: check dts: FDT_ERR_BADMAGIC, load default parameters
vpu: clk_level = 7
vpu: vpu_power_on
vpu: set clk: 666667000Hz, readback: 666666667Hz(0x100)
vpu: vpu_module_init_config
vpp: vpp_init
vpp: g12a/b osd1 matrix rgb2yuv ..............
vpp: g12a/b osd2 matrix rgb2yuv..............
vpp: g12a/b osd3 matrix rgb2yuv..............
cvbs: cpuid:0x29
tpm activate
01 01: 18
02 01: 00
03 04: 00 00 4f 35
06 08: 32 30 31 39 30 35 30 39
07 0f: 33 35 30 39 32 34 30 30 30 30 32 30 32 37 37
05 04: 01 01 01 01
08 01: 00
04 06: 00 09 34 4a ec c5
ff 01: 07
card out
** Bad device mmc 0 **
cannot get sdcard label
739 bytes read in 5 ms (143.6 KiB/s)
## Executing script at 01080000
1843270 bytes read in 32 ms (54.9 MiB/s)
[OSD]check dts: FDT_ERR_BADMAGIC, load default fb_addr parameters
[OSD]set initrd_high: 0x0
[OSD]fb_addr for logo: 0x0
[OSD]check dts: FDT_ERR_BADMAGIC, load default fb_addr parameters
[OSD]fb_addr for logo: 0x0
[OSD]VPP_OFIFO_SIZE:0xfff01fff
[CANVAS]canvas init
[CANVAS]addr=0x00000000 width=2560, height=1440
[OSD]osd_hw.free_dst_data: 0,1919,0,1079
[OSD]osd1_update_disp_freescale_enable
cvbs: outputmode[1080p50hz] is invalid
vpp: vpp_matrix_update: 2
set hdmitx VIC = 31
config HPLL = 5940000 frac_rate = 0
HPLL: 0x3b3a04f7
HPLL: 0x1b3a04f7
HPLLv1: 0xdb3a04f7
config HPLL done
j = 6 vid_clk_div = 1
hdmitx phy setting done
hdmitx: set enc for VIC: 31
enc_vpu_bridge_reset[1216]
rx version is 1.4 or below div=10
Recovery boot requested!
Net: dwmac.ff3f0000
Hit Enter or space or Ctrl+C key to stop autoboot -- : 0
Err imgread(L329):Fmt unsupported!genFmt 0x0 != 0x3
dreambox_one#